ISSN: 1549-8328
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IEEE Transactions on Circuits and Systems I: Regular Papers Q1 Unclaimed
IEEE Transactions on Circuits and Systems I: Regular Papers is a journal indexed in SJR in Electrical and Electronic Engineering with an H index of 157. It has an SJR impact factor of 1,038 and it has a best quartile of Q1.
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Publication frecuency: -


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Green OA- €
Non OAMetrics
1,038
SJR Impact factor157
H Index412
Total Docs (Last Year)872
Total Docs (3 years)13326
Total Refs3630
Total Cites (3 years)862
Citable Docs (3 years)4,15
Cites/Doc (2 years)32,34
Ref/DocAims and Scope
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Best articles
"Reply to ""Comments on Avoiding the Gain-Bandwidth Trade Off in Feedback Amplifiers"
View more3-D Nanoarchitectures With Carbon Nanotube Mechanical Switches for Future On-Chip Network Beyond CMOS Architecture
View moreA 1.3 mW low-IF, current-reuse, and current-bleeding RF front-end for the MICS band with sensitivity of -97 dbm
View moreA 12-Bit 100-MS/s Pipelined-SAR ADC With PVT-Insensitive and Gain-Folding Dynamic Amplifier
View moreA 12.77-MHz 31 ppm/ºC On-Chip RC Relaxation Oscillator With Digital Compensation Technique
View moreA Deep Investigation of the Synchronization Mechanisms in LC-CMOS Frequency Dividers
View moreA Fast Polar Code List Decoder Architecture Based on Sphere Decoding
View moreA Fully Integrated Low-Dropout Regulator With Differentiator-Based Active Zero Compensation
View moreA High-Sensitivity and Low-Walk Error LADAR Receiver for Military Application
View moreA Low Power Real-time On-Chip Power Sensor in 45-nm SOI
View moreA Low-Cost VLSI Architecture for Robust Distributed Estimation in Wireless Sensor Networks
View moreA Nanopower Biopotential Lowpass Filter Using Subthreshold Current-Reuse Biquads With Bulk Effect Self-Neutralization
View moreA Resistive RAM-Based FPGA Architecture Equipped With Efficient Programming Circuitry
View moreA Subthreshold Buffer-Based Biquadratic Cell and its Application to Biopotential Filter Design
View moreA Wide Dynamic Range CMOS Laser Radar Receiver With a Time-Domain Walk Error Compensation Scheme
View moreAn Analog Front-End Chip With Self-Calibrated Input Impedance for Monitoring of Biosignals via Dry Electrode-Skin Interfaces
View moreAn Integrated, Software-Defined FDD Transceiver: Distributed Duplexing Theory and Operation
View moreAnalog Circuit Design Using Tunnel-FETs
View moreAnalysis of Communication Network Performance From a Complex Network Perspective
View moreAnalysis of PWM Z-Source DC-DC Converter in CCM for Steady State
View moreBulkyflip: A NAND-SPIN-Based Last-Level Cache With Bandwidth-Oriented Write Management Policy
View moreCMOS-Photonics Codesign of an Integrated DAC-Less PAM-4 Silicon Photonic Transmitter
View moreComments on "Avoiding the Gain-Bandwidth Trade Off in Feedback Amplifiers"
View moreComments on "Chaotic Characteristics Analysis and Circuit Implementation for a Fractional-Order System"
View more
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