Default: IEEE Transactions on Circuits and Systems I: Regular Papers

ISSN: 1549-8328

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IEEE Transactions on Circuits and Systems I: Regular Papers Q1 Unclaimed

Institute of Electrical and Electronics Engineers Inc. United States
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IEEE Transactions on Circuits and Systems I: Regular Papers is a journal indexed in SJR in Electrical and Electronic Engineering with an H index of 157. It has an SJR impact factor of 1,038 and it has a best quartile of Q1.

IEEE Transactions on Circuits and Systems I: Regular Papers focuses its scope in these topics and keywords: applicationsa, wideband, circuits, power, frequency, current, demodulator, descent, cordic, electrochemical, ...

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Metrics

IEEE Transactions on Circuits and Systems I: Regular Papers

1,038

SJR Impact factor

157

H Index

412

Total Docs (Last Year)

872

Total Docs (3 years)

13326

Total Refs

3630

Total Cites (3 years)

862

Citable Docs (3 years)

4,15

Cites/Doc (2 years)

32,34

Ref/Doc

Aims and Scope


applicationsa, wideband, circuits, power, frequency, current, demodulator, descent, cordic, electrochemical, delta, flexible, fractionaln, function, gradient, hardware, highprecision, image, implementation, converters, control, amplifier, architectures, authenticationcurrent, automatic, based, bidirectional, bitflipping, boost, calibration, cell, circ, cmos, coherent, constant,


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"Reply to ""Comments on Avoiding the Gain-Bandwidth Trade Off in Feedback Amplifiers"

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3-D Nanoarchitectures With Carbon Nanotube Mechanical Switches for Future On-Chip Network Beyond CMOS Architecture

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A 1.3 mW low-IF, current-reuse, and current-bleeding RF front-end for the MICS band with sensitivity of -97 dbm

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A 12-Bit 100-MS/s Pipelined-SAR ADC With PVT-Insensitive and Gain-Folding Dynamic Amplifier

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A 12.77-MHz 31 ppm/ºC On-Chip RC Relaxation Oscillator With Digital Compensation Technique

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A Deep Investigation of the Synchronization Mechanisms in LC-CMOS Frequency Dividers

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A Fast Polar Code List Decoder Architecture Based on Sphere Decoding

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A Fully Integrated Low-Dropout Regulator With Differentiator-Based Active Zero Compensation

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A High-Sensitivity and Low-Walk Error LADAR Receiver for Military Application

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A Low Power Real-time On-Chip Power Sensor in 45-nm SOI

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A Low-Cost VLSI Architecture for Robust Distributed Estimation in Wireless Sensor Networks

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A Nanopower Biopotential Lowpass Filter Using Subthreshold Current-Reuse Biquads With Bulk Effect Self-Neutralization

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A Resistive RAM-Based FPGA Architecture Equipped With Efficient Programming Circuitry

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A Wide Dynamic Range CMOS Laser Radar Receiver With a Time-Domain Walk Error Compensation Scheme

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An Analog Front-End Chip With Self-Calibrated Input Impedance for Monitoring of Biosignals via Dry Electrode-Skin Interfaces

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An Integrated, Software-Defined FDD Transceiver: Distributed Duplexing Theory and Operation

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Analog Circuit Design Using Tunnel-FETs

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Analysis of Communication Network Performance From a Complex Network Perspective

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Analysis of PWM Z-Source DC-DC Converter in CCM for Steady State

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Bulkyflip: A NAND-SPIN-Based Last-Level Cache With Bandwidth-Oriented Write Management Policy

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CMOS-Photonics Codesign of an Integrated DAC-Less PAM-4 Silicon Photonic Transmitter

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Comments on "Avoiding the Gain-Bandwidth Trade Off in Feedback Amplifiers"

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