ISSN: 0167-9260

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Integration, the VLSI Journal Q2 Unclaimed

Elsevier B.V. Netherlands

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Integration, the VLSI Journal is a journal indexed in SJR in Software and Electrical and Electronic Engineering with an H index of 50. It has an SJR impact factor of 0,462 and it has a best quartile of Q2. It is published in English. It has an SJR impact factor of 0,462.

Type: Journal

Type of Copyright:

Languages: English

Open Access Policy:

Type of publications:

Publication frecuency: -

Categories: Electrical and Electronic Engineering (Q2) Hardware and Architecture (Q3) Software (Q3)

Price

- €

Inmediate OA

NPD

Embargoed OA

- €

Non OA

Metrics

0,462

SJR Impact factor

50

H Index

137

Total Docs (Last Year)

355

Total Docs (3 years)

4961

Total Refs

1153

Total Cites (3 years)

354

Citable Docs (3 years)

3.09

Cites/Doc (2 years)

36.21

Ref/Doc

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Aims and Scope

Best articles by citations

Frequency-dependent mutual resistance and inductance formulas for coupled IC interconnects on an Si-SiO2 substrate

A graph theoretic approach to feed-through pin assignment

A real-time systolic integer multiplier

Factored spherical subspace tracking

How good are slicing floorplans?

High-speed redundant reciprocal approximation

Modelling, analysis and synthesis of asynchronous control circuits using Petri nets

Generating new benchmark designs using a multi-terminal net model

A BDD-based verification method for large synthesized circuits

A non-iterative gate resizing algorithm for high reduction in power consumption

Systolic algorithms for solving a sparse system of linear equations in circuit simulation

Boolean function representation and spectral characterization using AND/OR graphs

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Routability-constrained multi-bit flip-flop construction for clock power reduction

Joint channel estimation and data detection under fading on reconfigurable fabric

Assignment and allocation of highly testable data paths under scan optimization

Modeling and designing silicon thin-film inductors and transformers using HSPICE for RFIC applications

Serial diagnostic fault simulation for synchronous sequential circuits

Communication code generation in systems of affine recurrence equations

New approach to design for reusability of arithmetic cores in systems-on-chip

A new approach for the design of linear systolic arrays for computing third-order cumulants

A modified noising algorithm for the graph partitioning problem