Journal of Electronic Testing
Journal of Electronic Testing is among the journals recognized for Editorial Excellence. Editor-in-Chief Dr. Vishwani Agrawal performed in the top 10% of qualifying journals* based on data collected from the Journal Author Satisfaction survey. Click here for more information: htt...
Metrics
Scimago and CountryOfPapers database fields
SJR Impact
0,316
H-index
38
Docs (year)
59
Docs 3y
154
Total refs
1834
Cites 3y
213
Citable 3y
133
Cites/Doc 2y
1.37
Ref/Doc
31.08
Immediate OA
2290 €
Embargoed OA
NPD
Non OA / Submission
0 €
Name good journals. Call out predatory ones.
Share what peer review, fees, and timelines were really like. Praise fair editors. Flag APC traps, fake metrics, or spam solicitations — with facts from your submission.
Researcher reviews
Best articles by citations
Modeling Remapping Based Fault Tolerance Techniques for Chip Multiprocessor Cache with Design Space Exploration
View moreTrojan Detection Test for Clockless Circuits
View moreTestability Trade-Offs for BIST Data Paths
View moreTest Technology Technical Council Newsletter
View moreScan Latch Design for Test Applications
View moreScalable Delay Fault BIST for Use with Low-Cost ATE
View moreReliability Model and Sensitivity Analysis for General Electronic Systems with Failure Types based on Non-identical Correlated Components
View moreOptimal Selection of Tests for Fault Diagnosis in Multi-Path System with Time-delay
View moreOn Using Approximate Computing to Build an Error Detection Scheme for Arithmetic Circuits
View moreMulti-Threaded Mitigation of Radiation-Induced Soft Errors in Bare-Metal Embedded Systems
View moreA Design for Testability Scheme for CMOS LC-Tank Voltage Controlled Oscillators
View moreImproved Pseudo-Random Fault Coverage Through Inversions: a Study on Test Point Architectures
View moreHigh-Level Implementation-Independent Functional Software-Based Self-Test for RISC Processors
View moreEditorial
View moreEditorial
View moreAnalysis of Test Application Time for Test Data Compression Methods Based on Compression Codes
View moreAnalog Switches in Programmable Analog Devices: Quiescent Defective Behaviours
View moreAn Efficient Test Set Construction Scheme for Multiple Missing-Gate Faults in Reversible Circuits
View moreAn Efficient Accuracy Reconfigurable CLA Adder Designs Using Complementary Logic
View moreA Low-Cost At-Speed BIST Architecture for Embedded Processor and SRAM Cores
View more