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VLSI Design
United States · Hindawi Publishing Corporati...
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VLSI Design

VLSI Design is a journal indexed in SJR in Electrical and Electronic Engineering and Hardware and Architecture with an H index of 25. It has a best quartile of Q4. It is published in English.

ISSN: 1065-514X
Publisher: Hindawi Publishing Corporation
Category: Electrical and Electronic Engineering
Indexation: verifiedDOAJ
open_in_new Portal NPD menu_book Guidelines NPD
schedule CountryOfPapers database fields
SJR Impact Factor trending_up
NPD Q4
H-index 25
Acceptance rate pie_chart
38%
Source Acceptance_Rate
Time to publication hourglass_top
NPD
Field NPD
Publication cost (APC) payments
NPD Open Access
Non-OA path NPD

Metrics

Scimago and CountryOfPapers database fields

DOAJ

SJR Impact

—

H-index

25

Docs (year)

0

Docs 3y

6

Total refs

0

Cites 3y

5

Citable 3y

6

Cites/Doc 2y

0

Ref/Doc

0.0

Immediate OA

—

Embargoed OA

NPD

Non OA / Submission

—

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Best articles by citations

A Parallel Residue-to-binary Converter for the Moduli Set {2m-1,220m+1,221m+1,...,22km+1}

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Word-serial Architectures for Filtering and Variable Rate Decimation

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Basic Algorithms for the Asynchronous Reconfigurable Mesh

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Analysis and Design of Regular Structures for Robust

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An Optimum Channel Routing Algorithm in the

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An Empirical Algorithm for Power Analysis in Deep Submicron Electronic Designs

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An Embedded Low Transistor Count 8-bit Analog-to-digital Converter Using a Binary Searching Method

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An Analytical Study of Smooth Solutions of the Bl??tekj?¶r Hydrodynamic Model of Electron Transport

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An Algorithm Visualization Tool on the Reconfigurable Mesh

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Advanced VLSI Design Methodologies for Emerging Industrial Multimedia and Communication Applications

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Accurate Coupling-centric Timing Analysis Incorporating Temporal and Functional Isolation

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A VHDL Based Expert System for Hardware

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A Novel, Automatic Quality Control Scheme for Real Time Image Transmission

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A Noise-shaping Accelerometer Interface Circuit for Two-chip Implementation

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A New Characterization Method for Delay and Power Dissipation of Standard Library Cells

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A New CDS Structure for High Density FPA with Low Power

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A Fast Dynamic 64-bit Comparator with Small Transistor Count

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A Fast ALU Design in CMOS for Low Voltage Operation

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A Dynamically Reconfigurable Video Compression Scheme Using FPGAs with Coarse-grain Parallelism

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A Contraction-based Ratio-cut Partitioning Algorithm

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