ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems is a journal indexed in SJR in Electrical and Electronic Engineering and Computer Science Applications with an H index of 60. It has an SJR impact factor of 0,51 and it has a best quartile of Q2. It is published in English. It has an SJR impact factor of 0,51.
Metrics
Scimago and CountryOfPapers database fields
SJR Impact
0,51
H-index
60
Docs (year)
98
Docs 3y
230
Total refs
4491
Cites 3y
571
Citable 3y
224
Cites/Doc 2y
2.17
Ref/Doc
45.83
Immediate OA
—
Embargoed OA
NPD
Non OA / Submission
—
Name good journals. Call out predatory ones.
Share what peer review, fees, and timelines were really like. Praise fair editors. Flag APC traps, fake metrics, or spam solicitations — with facts from your submission.
Researcher reviews
Best articles by citations
Automatic memory partitioning and scheduling for throughput and power optimization
View moreWaveSync
View moreConcurrent testing of digital microfluidics-based biochips
View moreCompact Modeling of Interconnect Circuits over Wide Frequency Band by Adaptive Complex-Valued Sampling Method
View moreCombining system scenarios and configurable memories to tolerate unpredictability
View moreCombinatorial techniques for mixed-size placement
View moreCode generation of nested loops for DSP processors with heterogeneous registers and structural pipelining
View moreCluster assignment for high-performance embedded VLIW processors
View moreCLIP: integer-programming-based optimal layout synthesis of 2D CMOS cells
View moreBoxRouter 2.0
View moreBIST and production testing of ADCs using imprecise stimulus
View moreBipartitioning and encoding in low-power pipelined circuits
View moreAutomatic verification of safety and liveness for pipelined machines using WEB refinement
View moreA codesign back-end approach for embedded system design
View moreAn energy characterization platform for memory devices and energy-aware data compression for multilevel-cell flash memory
View moreAn efficient algorithm for finding the minimal-area FPGA technology mapping
View moreAllocation of FIFO structures in RTL data paths
View moreA unified method for phase shifter computation
View moreA survey and taxonomy of on-chip monitoring of multicore systems-on-chip
View moreA scheduling algorithm for optimization and early planning in high-level synthesis
View moreA retargetable parallel-programming framework for MPSoC
View moreA Hybrid Technique for Discrete Gate Sizing Based on Lagrangian Relaxation
View moreA gridless routing system with nonslicing floorplanning-based crosstalk reduction on gridless track assignment
View moreA Fast Non-Monte-Carlo Yield Analysis and Optimization by Stochastic Orthogonal Polynomials
View more